Abstract—FPGA are a special form of Programmable logic devices (PLDs) with higher densities as compared to custom ICs and capable of implementing functionality in a short period of time using computer aided design (CAD) software. Reconfigurability refers to systems incorporating some form of hardware programmability, that customizes how the hardware is used using a number of physical control points. These control points can be changed periodically in order to execute different applications using the same hardware. This paper presents the FPGA implementation of reconfigurable switch architecture for next generation communication networks (NGN’s) where the configurations are changed by changing the control signal at the input. The reconfigurable architecture is implemented in HDL(Verilog) and the code is burned in Xilinx Spartan3-XC3S400 series using JTAG mode.
Index Terms—FPGA, MINs, network architectures, reconfigurability.
M. Hema Lata Rao was with the Jagannath Institute for Technology and
Management, Parlakhemundi, India. She is now research scholar at Indian
Institute of Technology Bhubaneswar (e-mail: hemalata.rao@cutm.ac.in).
Rajeev Tripathi is with the National Institute of Technology, Allahabad,
India (e-mail: rt@mnnit.ac.in).
Cite: M. Hema Lata Rao and Rajeev Tripathi, "FPGA Implementation of Reconfigurable Switch Architecture for Next Generation Communication Networks," International Journal of Engineering and Technology vol. 4, no. 6, pp. 770-773, 2012.
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