doi: 10.7763/IJET.2011.V3.265
Sine/Cosine Generator Using Pipelined CORDIC Processor
R. Ranga Teja
,
P. Sudhakara Reddy
- Dept. of ECE, Srikalahasteeswara Institute of Technology, Srikalahasthi, Andhra Pradesh, India
Abstract
At present, many of the computations in signal processing and wireless communication applications are linked with complex analysis of several functions. These complex functions are combination of sine and cosine terms that generally spread in the channel. Most of these functions can be split into elementary functions. In this paper we present a hardware efficient architecture by using CORDIC algorithm for the calculation of sine and cosine functions. This approach is simulated using ModelSim simulation software, synthesized using Xilinx ISE design suite and the proposed architecture is implemented on Xilinx FPGA target device i.e. SPARTAN 3E. Finally, the device utilization summary and timing reports are presented.
Keywords
- CORDIC
- FPGA
- Pipelined processor
- sine and cosine generator
How to Cite
R. Ranga Teja and P. Sudhakara Reddy, "Sine/Cosine Generator Using Pipelined CORDIC Processor," International Journal of Engineering and Technology, vol. 3, no. 4, pp. 431-434, 2011. https://doi.org/ 10.7763/IJET.2011.V3.265
Copyright & License
Copyright © 2011 by the authors. This is an open access article distributed under the Creative Commons Attribution License which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited (CC BY 4.0).