doi: 10.7763/IJET.2011.V3.229
Design of Optimized Reversible BCD Adder/Subtractor
Rashmi S. B
,
Praveen B
,
Tilak B G.
- Department of Electronics and Communication, Sri Bhagawan Mahaveer Jain College of Engineering (SBMJCE, JU), Ramanagara, India
Abstract
Reversible logic has emerged as one of the most important research area in the past few decades. Reversible or information lossless circuits have applications in nanotechnology, digital signal processing, communication, computer graphics and cryptography. It is also a fundamental requirement in the emerging field of quantum computing. In this paper an optimized method is proposed to realize a reversible Binary Coded Decimal (BCD) adder/subtractor circuit. In order to optimize the design, nines compliment gate (NCG) and BSCL gates are proposed. This proposed reversible BCD adder/subtractor is evaluated and optimized in terms of gate count, constant inputs and garbage outputs.
Keywords
- Basic
- reversible
- gates;
- Reversible
- BCD
- adder;
- Reversible
- BCD
- subtractor;
- Constant
- input;
- Garbage;
- Gate
- count;
- Optimization
How to Cite
Rashmi S. B, Praveen B, and Tilak B G., "Design of Optimized Reversible BCD Adder/Subtractor," International Journal of Engineering and Technology, vol. 3, no. 3, pp. 230-234, 2011. https://doi.org/ 10.7763/IJET.2011.V3.229
Copyright & License
Copyright © 2011 by the authors. This is an open access article distributed under the Creative Commons Attribution License which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited (CC BY 4.0).