Abstract—This paper proposes a novel memory architecture called VP SRAM-based TCAM (Vertically Partitioned Static Random Access Memory based-Ternary Content Addressable Memory) that emulates TCAM functionality with SRAM.VP SRAM-based TCAM dissects conventional TCAM table vertically (column-wise) into TCAM sub-tables, which are then processed to be stored in their corresponding SRAM blocks. During search operation, SRAM blocks are addressed in parallel by their corresponding sub-words of the input word and the read out rows of which are bit-wise ANDed that results in potential matching address(s) where a priority encoder selects the highest priority matching address. Search operation in VP SRAM-based TCAM involves two SRAM accesses followed by ANDing operation. Analysis shows that maximum possible number of vertical partitions reduces size of the proposed TCAM approximately by a factor of 1.3 than its traditional counterpart and offers optimized values for both area and latency of VP SRAM-based TCAM and hence, is a practically feasible alternative to traditional TCAMs.
Index Terms—Memory architecture, SRAM, ternary content addressable memory (TCAM), vertical partition.
Zahid Ullah is with the Department of Electronic Engineering, City University of Hong Kong, 83 Tat Chee Avenue, Kowloon Tong, Hong Kong, on study leave from FAST-National University of Computer and Emerging Sciences, Peshawar Campus, Pakistan (e-mail:email@example.com).
Cite: Zahid Ullah and Sanghyeon Baeg, "Vertically Partitioned SRAM-Based Ternary Content Addressable Memory," International Journal of Engineering and Technology vol. 4, no. 6, pp. 760-764, 2012.