doi: 10.7763/IJET.2012.V4.424
Implementation of FPGA Based Fault Injection Tool (FITO) for Testing Fault Tolerant Designs
Swathi Rudrakshi
1
,
Vasujadevi Midasala
2
,
S. Naga Kishore Bhavanam
1
- 1 the M. Tech. (VLSI-SD), Dept. of E.C. E. ATRI, JNTUH, Hyderabad, A.P, India
- 2 the M. Tech. (VLSI-SD), Dept. of E.C.E BSIT, JNTUH Hyderabad, A.P, India
Abstract
Fault injection is mainly used to test and evaluate the fault-tolerance based designs. In current VLSI technology fault injection has become a popular technique for experimentally verifying the fault tolerant based designs. There are fundamentally two types of fault injection methods; they are hardware-based fault injection and software-based fault injection. Both have their own limitations and advantages. The FPGA synthesizable fault injection model can give reasonable solution with high speed testing platform and also allows good controllability and observability. Even though a considerable progress has been made in research part of the fault injection algorithms, there is a little progress done in developing a tool for FPGA based fault emulation. In this paper an FPGA-based fault injection tool (FITO) that supports several synthesizable fault models of digital systems are implemented using VHDL. Aim is to build real time fault injection mechanism with good controllability and observability. Fault injection will be done by applying some extra gates and wires to the original design description and modifying the target VHDL model of the target system. The design will be validated with state machine based example and applying different types of faults. Analysis will be carried out studying the controllability and observability of the proposed scheme. Comparison will be carried out to estimate the speed wise improvement with respect to software simulation based fault injection method. Modelsim Xilinx Edition (MXE) will be used for functional simulation and Xilinx ISE tools will be used for synthesis and performance analysis. Spartan-3E FPGA board will be used for on chip verification of the results with Chipscope software running on PC
Keywords
- VLSI
- FITO
- VHDL
- fault modeling
- modelsim
- xilinx
- GUI
- spartan 3E FPGA kit
How to Cite
Swathi Rudrakshi, Vasujadevi Midasala, and S. Naga Kishore Bhavanam, "Implementation of FPGA Based Fault Injection Tool (FITO) for Testing Fault Tolerant Designs," International Journal of Engineering and Technology, vol. 4, no. 5, pp. 522-526, 2012. https://doi.org/ 10.7763/IJET.2012.V4.424
Copyright & License
Copyright © 2012 by the authors. This is an open access article distributed under the Creative Commons Attribution License which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited (CC BY 4.0).