doi: 10.7763/IJET.2010.V2.93
The Analysis of Parameter Limitation in Diode-Clamped Resonant Gate Drive Circuit
N. Z. Yahaya
1
,
K. M. Begam
1
,
M. Awan
2
- 1 Universiti Teknologi PETRONAS, Malaysia
- 2 Electrical Engineering Department, Universiti Teknologi PETRONAS, Malaysia
Abstract
Switching loss has to be reduced in order to improve converter’s performance and efficiency. In high switching frequency, the effect of the loss is much greater. The duty ratio, dead time and inductor value are the limiting parameters which bring implications on the switching loss and hence total gate drive loss. Using PSpice circuit simulator, the optimization of these parameters have been carried out and it is found that the duty ratio, dead time and resonant inductor value are 20 %, 15 ns and 9 nH respectively. The details for choosing these values are presented in this paper.
Keywords
- PSpice
- simulation;
- resonant
- gate
- drive;
- switching
- loss
How to Cite
N. Z. Yahaya, K. M. Begam, and M. Awan, "The Analysis of Parameter Limitation in Diode-Clamped Resonant Gate Drive Circuit," International Journal of Engineering and Technology, vol. 2, no. 1, pp. 17-22, 2010. https://doi.org/ 10.7763/IJET.2010.V2.93
Copyright & License
Copyright © 2010 by the authors. This is an open access article distributed under the Creative Commons Attribution License which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited (CC BY 4.0).