Abstract—A novel stream cipher based on chaotic synchronization is presented in this paper, a simple and effective technique is used for this purpose; it consists of feeding back the ciphertext to the cryptosystem and incorporates it on the driver signal for synchronization. Simulation results showed that the proposed stream cipher (PSC) has good confusion/diffusion properties and provide a strong key. The performed statistical and security analysis on the PSC confirms its feasibility for security purposes. The hardware-in-the-loop co-simulation over Xilinx XC6SLX45 FPGA of the PSC is provided, where a clock frequency of 50.24 MHz is achieved corresponding to high throughput of 2.51 Gbps. The obtained results make the PSC suitable for nowadays needs of secure and robust crypto-systems.
Index Terms—Chaos, encryptions, synchronization, NIST, diehard, PRNG, FPGA.
Lahcene Merah, Adda Ali-Pacha, and Naima Hadj-Said are with University of science and technology of Oran, Algeria (e-mail: merahlah@gmail.com.)
Belkacem Mecheri and Mustafa Dellassi are with University of Laghouat, Algeria.
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Cite: Lahcene Merah, Adda Ali-Pacha, Naima Hadj-Said, Belkacem Mecheri, and Mustafa Dellassi, "FPGA Hardware Co-simulation of New Chaos-Based Stream Cipher Based on Lozi Map," International Journal of Engineering and Technology vol. 9, no. 5, pp. 420-425, 2017.
